Object recognition using Neural Network with hardware accelerator on Embedded System

Raum Foyer

Typ Demo

Studiengang / Lehrstuhl / Firma
Center for Advancing Electronics Dresden, TU Dresden

The object recognition task using Neural Network requires lots of computing power in order to provide high throughput. Traditional embedded system with RISC processor cannot cope with the demands. However, with the assistance of the hardware accelerator running on the FPGA, the throughput on such a system can be significantly increased.